![]() The truth table of 3 –input OR gate is given below Th output of the OR gate is equal to the sum of the inputs. Though the OR gate have 3 inputs, the Boolean equation will not change. We can design an OR gate with 3 inputs also. The output is calculated at the emitter of the transistors.įor OR logic circuit, the transistors are connected in parallel and the output of the circuit is measured HIGH when both the transistors conducting or if any one of the transistors is conducting. Emitter of second transistor is connected to ground. +6 volts voltage is supplied to collectors of transistors to drive the circuit and inputs are applied to the transistor through a resistor. OR gate designed using NPN transistor is shown in the below diagram. We can construct an OR gate by using diodes as well as transistors also. When both the inputs of the OR gate are at low level, then the output also comes to low level.īack to top OR gate using NPN transistors ![]() And further even when either of the inputs is high, then the output of OR gates continued to be high state. When the two inputs are high, then the output is also high. Let’s apply two different clock signals to both the inputs of OR logic gate A and B, then if we observe the output of the OR gate it will be as shown below.
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